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258 lines
6.5 KiB
258 lines
6.5 KiB
// *** Hardwarespecific functions *** |
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void UTFT::_hw_special_init() |
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{ |
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#ifdef EHOUSE_DUE_SHIELD |
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pinMode(24, OUTPUT); digitalWrite(24, HIGH); // Set the TFT_RD pin permanently HIGH as it is not supported by UTFT |
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#endif |
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} |
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void UTFT::LCD_Writ_Bus(char VH,char VL, byte mode) |
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{ |
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switch (mode) |
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{ |
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case 1: |
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if (display_serial_mode==SERIAL_4PIN) |
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{ |
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if (VH==1) |
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sbi(P_SDA, B_SDA); |
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else |
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cbi(P_SDA, B_SDA); |
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pulse_low(P_SCL, B_SCL); |
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} |
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else |
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{ |
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if (VH==1) |
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sbi(P_RS, B_RS); |
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else |
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cbi(P_RS, B_RS); |
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} |
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if (VL & 0x80) |
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sbi(P_SDA, B_SDA); |
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else |
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cbi(P_SDA, B_SDA); |
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pulse_low(P_SCL, B_SCL); |
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if (VL & 0x40) |
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sbi(P_SDA, B_SDA); |
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else |
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cbi(P_SDA, B_SDA); |
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pulse_low(P_SCL, B_SCL); |
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if (VL & 0x20) |
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sbi(P_SDA, B_SDA); |
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else |
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cbi(P_SDA, B_SDA); |
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pulse_low(P_SCL, B_SCL); |
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if (VL & 0x10) |
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sbi(P_SDA, B_SDA); |
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else |
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cbi(P_SDA, B_SDA); |
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pulse_low(P_SCL, B_SCL); |
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if (VL & 0x08) |
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sbi(P_SDA, B_SDA); |
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else |
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cbi(P_SDA, B_SDA); |
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pulse_low(P_SCL, B_SCL); |
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if (VL & 0x04) |
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sbi(P_SDA, B_SDA); |
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else |
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cbi(P_SDA, B_SDA); |
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pulse_low(P_SCL, B_SCL); |
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if (VL & 0x02) |
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sbi(P_SDA, B_SDA); |
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else |
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cbi(P_SDA, B_SDA); |
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pulse_low(P_SCL, B_SCL); |
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if (VL & 0x01) |
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sbi(P_SDA, B_SDA); |
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else |
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cbi(P_SDA, B_SDA); |
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pulse_low(P_SCL, B_SCL); |
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break; |
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case 8: |
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#if defined(CTE_DUE_SHIELD) || defined(EHOUSE_DUE_SHIELD) |
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REG_PIOC_CODR=0xFF000; |
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REG_PIOC_SODR=(VH<<12) & 0xFF000; |
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pulse_low(P_WR, B_WR); |
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REG_PIOC_CODR=0xFF000; |
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REG_PIOC_SODR=(VL<<12) & 0xFF000; |
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pulse_low(P_WR, B_WR); |
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#else |
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REG_PIOA_CODR=0x0000C000; |
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REG_PIOD_CODR=0x0000064F; |
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REG_PIOA_SODR=(VH & 0x06)<<13; |
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(VH & 0x01) ? REG_PIOB_SODR = 0x4000000 : REG_PIOB_CODR = 0x4000000; |
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REG_PIOD_SODR=((VH & 0x78)>>3) | ((VH & 0x80)>>1); |
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pulse_low(P_WR, B_WR); |
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REG_PIOA_CODR=0x0000C000; |
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REG_PIOD_CODR=0x0000064F; |
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REG_PIOA_SODR=(VL & 0x06)<<13; |
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(VL & 0x01) ? REG_PIOB_SODR = 0x4000000 : REG_PIOB_CODR = 0x4000000; |
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REG_PIOD_SODR=((VL & 0x78)>>3) | ((VL & 0x80)>>1); |
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pulse_low(P_WR, B_WR); |
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#endif |
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break; |
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case 16: |
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#if defined(CTE_DUE_SHIELD) |
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REG_PIOC_CODR=0xFF1FE; |
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REG_PIOC_SODR=(VL<<1) & 0x1FE; |
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REG_PIOC_SODR=(VH<<12) & 0xFF000; |
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#elif defined(EHOUSE_DUE_SHIELD) |
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PIOC->PIO_ODSR = ((PIOC->PIO_ODSR&(~0x000FF3FC)) | ((((uint32_t)VL)<<2) | (((uint32_t)VH)<<12))); |
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#else |
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REG_PIOA_CODR=0x0000C080; |
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REG_PIOC_CODR=0x0000003E; |
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REG_PIOD_CODR=0x0000064F; |
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REG_PIOA_SODR=((VH & 0x06)<<13) | ((VL & 0x40)<<1); |
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(VH & 0x01) ? REG_PIOB_SODR = 0x4000000 : REG_PIOB_CODR = 0x4000000; |
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REG_PIOC_SODR=((VL & 0x01)<<5) | ((VL & 0x02)<<3) | ((VL & 0x04)<<1) | ((VL & 0x08)>>1) | ((VL & 0x10)>>3); |
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REG_PIOD_SODR=((VH & 0x78)>>3) | ((VH & 0x80)>>1) | ((VL & 0x20)<<5) | ((VL & 0x80)<<2); |
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#endif |
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pulse_low(P_WR, B_WR); |
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break; |
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case LATCHED_16: |
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asm("nop"); // Mode is unsupported |
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break; |
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} |
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} |
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void UTFT::LCD_Write_Bus_8(char VL) |
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{ |
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#if defined(CTE_DUE_SHIELD) || defined(EHOUSE_DUE_SHIELD) |
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REG_PIOC_CODR=0xFF000; |
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REG_PIOC_SODR=(VL<<12) & 0xFF000; |
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pulse_low(P_WR, B_WR); |
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#else |
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REG_PIOA_CODR=0x0000C000; |
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REG_PIOD_CODR=0x0000064F; |
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REG_PIOA_SODR=(VL & 0x06)<<13; |
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(VL & 0x01) ? REG_PIOB_SODR = 0x4000000 : REG_PIOB_CODR = 0x4000000; |
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REG_PIOD_SODR=((VL & 0x78)>>3) | ((VL & 0x80)>>1); |
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pulse_low(P_WR, B_WR); |
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#endif |
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} |
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void UTFT::_set_direction_registers(byte mode) |
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{ |
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if (mode!=LATCHED_16) |
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{ |
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#if defined(CTE_DUE_SHIELD) |
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if (mode==16) |
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{ |
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REG_PIOC_OER=0x000FF1FE; |
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} |
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else |
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REG_PIOC_OER=0x000FF000; |
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#elif defined(EHOUSE_DUE_SHIELD) |
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if (mode==16) |
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{ |
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REG_PIOC_OER=0x000FF3FC; |
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REG_PIOC_OWER=0x000FF3FC; |
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} |
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else |
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REG_PIOC_OER=0x000FF000; |
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#else |
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REG_PIOA_OER=0x0000c000; //PA14,PA15 enable |
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REG_PIOB_OER=0x04000000; //PB26 enable |
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REG_PIOD_OER=0x0000064f; //PD0-3,PD6,PD9-10 enable |
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if (mode==16) |
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{ |
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REG_PIOA_OER=0x00000080; //PA7 enable |
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REG_PIOC_OER=0x0000003e; //PC1 - PC5 enable |
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} |
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#endif |
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} |
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else |
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{ |
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asm("nop"); // Mode is unsupported |
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} |
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} |
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void UTFT::_fast_fill_16(int ch, int cl, long pix) |
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{ |
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long blocks; |
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#if defined(CTE_DUE_SHIELD) |
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REG_PIOC_CODR=0xFF1FE; |
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REG_PIOC_SODR=(cl<<1) & 0x1FE; |
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REG_PIOC_SODR=(ch<<12) & 0xFF000; |
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#elif defined(EHOUSE_DUE_SHIELD) |
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PIOC->PIO_ODSR = ((PIOC->PIO_ODSR&(~0x000FF3FC)) | ((((uint32_t)cl)<<2) | (((uint32_t)ch)<<12))); |
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#else |
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REG_PIOA_CODR=0x0000C080; |
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REG_PIOC_CODR=0x0000003E; |
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REG_PIOD_CODR=0x0000064F; |
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REG_PIOA_SODR=((ch & 0x06)<<13) | ((cl & 0x40)<<1); |
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(ch & 0x01) ? REG_PIOB_SODR = 0x4000000 : REG_PIOB_CODR = 0x4000000; |
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REG_PIOC_SODR=((cl & 0x01)<<5) | ((cl & 0x02)<<3) | ((cl & 0x04)<<1) | ((cl & 0x08)>>1) | ((cl & 0x10)>>3); |
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REG_PIOD_SODR=((ch & 0x78)>>3) | ((ch & 0x80)>>1) | ((cl & 0x20)<<5) | ((cl & 0x80)<<2); |
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#endif |
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blocks = pix/16; |
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for (int i=0; i<blocks; i++) |
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{ |
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pulse_low(P_WR, B_WR); |
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pulse_low(P_WR, B_WR); |
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pulse_low(P_WR, B_WR); |
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pulse_low(P_WR, B_WR); |
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pulse_low(P_WR, B_WR); |
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pulse_low(P_WR, B_WR); |
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pulse_low(P_WR, B_WR); |
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pulse_low(P_WR, B_WR); |
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pulse_low(P_WR, B_WR); |
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pulse_low(P_WR, B_WR); |
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pulse_low(P_WR, B_WR); |
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pulse_low(P_WR, B_WR); |
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pulse_low(P_WR, B_WR); |
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pulse_low(P_WR, B_WR); |
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pulse_low(P_WR, B_WR); |
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pulse_low(P_WR, B_WR); |
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} |
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if ((pix % 16) != 0) |
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for (int i=0; i<(pix % 16)+1; i++) |
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{ |
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pulse_low(P_WR, B_WR); |
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} |
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} |
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void UTFT::_fast_fill_8(int ch, long pix) |
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{ |
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long blocks; |
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#if defined(CTE_DUE_SHIELD) || defined(EHOUSE_DUE_SHIELD) |
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REG_PIOC_CODR=0xFF000; |
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REG_PIOC_SODR=(ch<<12) & 0xFF000; |
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#else |
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REG_PIOA_CODR=0x0000C000; |
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REG_PIOD_CODR=0x0000064F; |
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REG_PIOA_SODR=(ch & 0x06)<<13; |
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(ch & 0x01) ? REG_PIOB_SODR = 0x4000000 : REG_PIOB_CODR = 0x4000000; |
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REG_PIOD_SODR=((ch & 0x78)>>3) | ((ch & 0x80)>>1); |
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#endif |
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blocks = pix/16; |
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for (int i=0; i<blocks; i++) |
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{ |
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pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR); |
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pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR); |
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pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR); |
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pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR); |
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pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR); |
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pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR); |
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pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR); |
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pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR); |
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pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR); |
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pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR); |
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pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR); |
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pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR); |
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pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR); |
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pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR); |
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pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR); |
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pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR); |
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} |
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if ((pix % 16) != 0) |
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for (int i=0; i<(pix % 16)+1; i++) |
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{ |
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pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR); |
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} |
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}
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